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Type of bit parity Successful transmission scenario A wants to transmit: 1001 A computes parity bit value: 1 0 0 1 (mod 2) = 0 A adds parity bit and sends: 10010 Even parity B receives: 10010 B computes parity: 1 0 0 1 0 (mod 2) = 0 B reports correct transmission after observing expected even result.

A wants to transmit: 1001 Odd parity A computes parity bit value: 1 0 0 1 (mod 2) = 0 A adds parity bit and sends: 10011 Ignou Study Helper-Sunil Poonia Page 7 receives: 10011 B computes overall parity: 1 0 0 1 1 (mod 2) = 1 B reports correct transmission after observing expected odd result.

This mechanism enables the detection of single bit errors, because if one bit gets flipped due to line noise, there will be an incorrect number of ones in the received data.

In the two examples above, B's calculated parity value matches the parity bit in its received value, indicating there are no single bit errors.

In the case of a RAID 3 array of 12 drives, 11 drives participate in the XOR calculation shown above and yield a value that is then stored on the dedicated parity drive.

(e) Design a two bit down counter (a sequential circuit).Error detection If an odd number of bits (including the parity bit) are transmitted incorrectly, the parity bit will be incorrect, thus indicating that a parity erroroccurred in the transmission.The parity bit is only suitable for detecting errors; it cannot correct any errors, as there is no way to determine which particular bit is corrupted.IGNOU MCS-012 Study Materials/Books – If you come to this page for download each course of MCS-012 Study Material so you are come at right place.Here you will get everything for which you have come to here.Consider the following example with a transmission error in the second bit using XOR: Type of bit parity error Failed transmission scenario A wants to transmit: 1001 A computes parity bit value: 1^0^0^1 = 0 A adds parity bit and sends: 10010 Even parity ... Error in the second bit B receives: 11010 B computes overall parity: 1^1^0^1^0 = 1 B reports incorrect transmission after observing unexpected odd result.A wants to transmit: 1001 A computes even parity value: 1^0^0^1 = 0 A sends: 10010 Even parity ... Error in the parity bit B receives: 10011 B computes overall parity: 1^0^0^1^1 = 1 B reports incorrect transmission after observing unexpected odd result. A parity bit is only guaranteed to detect an odd number of bit errors.We have downloaded all available Study Materials of MCS-012 to our System and it is ready and available for all MCS-012 Students. For attend IGNOU MCS-012 TEE Examination, it is necessary to first submit your Assignments to IGNOU and it is possible from IGNOU Study Material.You can solve your MCS-012 Assignments with using Books/Materials.The counter states are 11, 10, 01, 00, 11, 10, 01, 00, 11, You should show the state table, state diagram, the k-map for circuit design and logic diagram of the resultant design using D flipflop or J-K flip flop. A sequential circuit is specified by a time sequence of external inputs, external outputs and internal flip-flop binary states.Thus firstly, a state table and state diagram is used to describe behaviour of the circuit.

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